DocumentCode :
723105
Title :
Characterization of 3D stacked high resistivity Si interposers with polymer TSV liners for 3D RF module
Author :
Kwang-Seong Choi ; Haksun Lee ; Hyun-Cheol Bae ; Yong-Sung Eom ; Kangwook Lee ; Fukushima, Takafumi ; Koyanagi, Mitsumasa ; Jin HoLee
Author_Institution :
IT Mater. & Components Lab., ETRI, Daejeon, South Korea
fYear :
2015
fDate :
26-29 May 2015
Firstpage :
928
Lastpage :
933
Abstract :
The material designs of the Si interposers are optimized for a 3D RF module. The high resistivity Si wafers are used for the Si interposer fabrication: 1,000 Ω·cm ~ 10,000 Ω·cm. To reduce the capacitance and mechanical stress between Cufilled TSV and Si substrate, a polyimide insulation layer is applied as a TSV liner. We designs several types of the transmission line structures and measures their electrical properties. For the 3D interconnection between the Si interposers, fluxing underfill material is developed and used as a pre-applied underfill for the thermocompression bonding process. With these optimizations of materials design of the Si interposers, the microstrip line shows the electrical loss of 0.065 dB/mm at 10 GHz, and the insertion loss of the vertical transition is 0.4 dB at 10 GHz.
Keywords :
elemental semiconductors; integrated circuit manufacture; lead bonding; microstrip lines; radiofrequency integrated circuits; silicon; three-dimensional integrated circuits; 3D RF module; 3D stacked high resistivity Si interposers; Cufilled TSV; Si; Si interposer fabrication; Si wafers; frequency 10 GHz; loss 0.4 dB; microstrip line; polyimide insulation layer; polymer TSV liners; thermocompression bonding process; Insertion loss; Loss measurement; Microstrip; Silicon; Substrates; Three-dimensional displays; Transmission line measurements;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
Conference_Location :
San Diego, CA
Type :
conf
DOI :
10.1109/ECTC.2015.7159705
Filename :
7159705
Link To Document :
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