• DocumentCode
    723118
  • Title

    Analysis of copper plasticity impact in TSV-middle and backside TSV-last fabrication processes

  • Author

    Wei Guo ; Karmarkar, Aditya P. ; Xiaopeng Xu ; Van der Plas, Geert ; Van Huylenbroeck, Stefaan ; Gonzalez, Mario ; Absil, Philippe ; El Sayed, Karim ; Beyne, Eric

  • Author_Institution
    IMEC, Leuven, Belgium
  • fYear
    2015
  • fDate
    26-29 May 2015
  • Firstpage
    1038
  • Lastpage
    1044
  • Abstract
    Copper plasticity effects in TSV middle and backside TSV last integration flows are analyzed using an advanced 3D TCAD simulator with model parameters calibrated to match experimental data. In this work, a low thermal budget TSV last integration flow is considered. In contrast to the TSV middle flow, the TSV last flow studied here exhibits insignificant TSV pumping, M1 metal thinning or M1 metal resistance increase. The difference in residual stress profiles in BEOL structure for TSV middle and TSV last processes indicates that the process sequence must be optimized in order to minimize the reliability risks. The mobility change in active silicon for the TSV last process is lower as compared to that for the TSV middle process at room temperature due to the lower temperature excursions during the TSV last integration. This study demonstrates that the TSV integration flow must be designed and selected carefully to meet specific performance and reliability requirements.
  • Keywords
    copper; integrated circuit manufacture; integrated circuit reliability; integrated circuit technology; internal stresses; plasticity; silicon; technology CAD (electronics); three-dimensional integrated circuits; 3D TCAD simulator; BEOL structure; M1 metal resistance; M1 metal thinning; TSV last integration flow; TSV last process; TSV pumping; TSV-middle process; active silicon; back end of line structure; backside TSV process; copper plasticity impact analysis; fabrication process; mobility change; process sequence; reliability risk; residual stress profile; thermal budget; through silicon via; Copper; Mathematical model; Silicon; Strain; Stress; Thermal stresses;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC) , 2015 IEEE 65th
  • Conference_Location
    San Diego, CA
  • Type

    conf

  • DOI
    10.1109/ECTC.2015.7159723
  • Filename
    7159723