A proposed RTL design technique for highly optimized on-chip data processors of MEMS sensors

Semiconductor sensor systems based on specific MEMS structures usually have to comprise at least a robust on-chip analogue read-out circuitry making it possible to detect and post-process the changes in physical characteristics. In order to ensure mobility or to improve reliability, robustness and performance (speed and/or power-consumption) the subsequent parts of the post-processing circuitry, namely the digital data processor or certain parts of it may also be implemented on-chip. Integration and cost usually treated as main objectives in both analogue and digital designs become essential when the data-processing subsystem has to be fit in a very limited area close to a MEMS sensor structure. The paper presents a novel Register-Transfer Level (RTL) design method aiming optimized design of digital data-processing systems related to MEMS sensors´ post-processing algorithms. The paper presents a novel RTL description language and a unique synthesis flow resulting in area-optimized gate-level implementations capable of fulfilling the strict requirements set by the MEMS-based sensor environment.