A divide-by-3 injection-locked frequency divider in 0.18 µm CMOS process for K band applications

Author

Yu-Hsin Chang ; Yen-Chung Chiang

Author_Institution

Dept. of Electr. Eng., Nat. Chung Hsing Univ., Taichung, Taiwan

fYear

2015

fDate

17-22 May 2015

Firstpage

1

Lastpage

3

Abstract

A divide-by-3 injection-locked frequency divider (ILFD) implemented in the 0.18 μm CMOS process is proposed for K band applications. The proposed ILFD adopts the stacked cross-coupled transistor pair topology to enhance the required frequency component and to reduce dc power consumption. Without the help of varactors, the measured locking range of the proposed ILFD is from 20.4 to 23.8 GHz under 0-dBm input power level. The core circuit dissipates 3.9 mW power from a 1.5-V dc supply.

Keywords

CMOS integrated circuits; frequency dividers; microwave integrated circuits; phase locked loops; CMOS process; DC power consumption; K band; divide-by-3 ILFD; frequency 20.4 GHz to 23.8 GHz; injection-locked frequency divider; power 3.9 mW; size 0.18 mum; transistor pair topology; voltage 1.5 V; CMOS integrated circuits; CMOS process; Frequency conversion; Impedance matching; Indexes; Semiconductor device measurement; Tuning; CMOS process; injection-locked frequency divider; locking range; microwave circuits; phase locked loop; phase noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium (IMS), 2015 IEEE MTT-S International

Conference_Location

Phoenix, AZ

Type

conf

DOI

10.1109/MWSYM.2015.7166735

Filename

7166735