DocumentCode
726456
Title
Parallel circuit simulation using the direct method on a heterogeneous cloud
Author
Helal, Ahmed E. ; Bayoumi, Amr M. ; Hanafy, Yasser Y.
Author_Institution
Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA
fYear
2015
fDate
8-12 June 2015
Firstpage
1
Lastpage
6
Abstract
This paper discusses the development of a parallel SPICE circuit simulator using the direct method on a cloud-based heterogeneous cluster, which includes multiple HPC compute nodes with multi-sockets, multicores, and GPUs. A simple model is derived to optimally partition the circuit between the compute nodes. The parallel simulator is divided into four major kernels: Partition Device Model Evaluation (PME), Partition Matrix Factorization (PMF), Interconnection Matrix Evaluation (IME), and Interconnection Matrix Factorization (IMF). Another model is derived to assign each of the kernels to the most suitable execution platform of the Amazon EC2 heterogeneous cloud. The partitioning approach using heterogeneous resources has achieved an order-of-magnitude speedup over optimized multithreaded implementations of SPICE using state of the art KLU and NICSLU packages for matrix solution.
Keywords
circuit simulation; cloud computing; matrix decomposition; Amazon EC2 heterogeneous cloud; GPUs; HPC compute nodes; IME kernel; IMF kernel; KLU package; NICSLU package; PME kernel; PMF kernel; circuit partition; cloud-based heterogeneous cluster; graphics processing unit; heterogeneous resources; high performance computing; interconnection matrix evaluation; interconnection matrix factorization; multicores; multisockets; parallel SPICE circuit simulator; partition device model evaluation; partition matrix factorization; partitioning approach; Computational modeling; Graphics processing units; Integrated circuit interconnections; Integrated circuit modeling; Kernel; SPICE; Synchronization; Accelerators; Circuit Simulation; Cloud Computing; GPU; HPC; Heterogeneous Computing; SPICE;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2015 52nd ACM/EDAC/IEEE
Conference_Location
San Francisco, CA
Type
conf
DOI
10.1145/2744769.2744888
Filename
7167371
Link To Document