DocumentCode :
726938
Title :
Low-voltage read/write circuit design for transistorless ReRAM crossbar arrays in 180nm CMOS technology
Author :
Sandrini, Jury ; Demirci, Tugba ; Thammasack, Maxime ; Sacchetto, Davide ; Leblebici, Yusuf
Author_Institution :
Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
fYear :
2015
fDate :
24-27 May 2015
Firstpage :
9
Lastpage :
12
Abstract :
This paper presents a read-write design solution for passive ReRAM crossbar memory arrays to overcome the sneak current paths problem. The proposed circuitry includes an auto-calibration feature to overcome the sneak current effects during the READ operation, and a WRITE protocol to minimize the current at each row and column lines. The presented circuit has been designed in 180nm standard CMOS technology based on the electrical characteristics of fabricated ReRAM devices.
Keywords :
CMOS memory circuits; calibration; logic design; passive networks; protocols; resistive RAM; CMOS technology; READ operation; ReRAM devices; WRITE protocol; autocalibration feature; low-voltage read-write circuit design; passive ReRAM crossbar memory arrays; size 180 nm; transistorless ReRAM crossbar arrays; CMOS integrated circuits; CMOS technology; Calibration; Integrated circuit modeling; Programming; Resistance; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
Type :
conf
DOI :
10.1109/ISCAS.2015.7168557
Filename :
7168557
Link To Document :
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