Title :
TAB barrier: Hybrid barrier synchronization for NoC-based processors
Author :
Zhenqi Wei ; Peilin Liu ; Rongdi Sun ; Rendong Ying
Author_Institution :
Sch. of Electron., Inf. & Electr. Eng., Shanghai Jiao Tong Univ., Shanghai, China
Abstract :
As one of the mostly used synchronization schemes in parallel programming on multi-core processors, barrier synchronization has been extensively studied in former research works. In conventional master-slave barrier or tree barrier, usually one centric core is selected to collect barrier arriving messages and to broadcast barrier releasing messages. Unfortunately the barrier core sometimes is deviated from the center location and may lead to worse synchronization efficiency. We propose a hybrid tree-based all-to-all (TAB) barrier for NoC-based many-core processors to relieve performance degradation caused by the off-centered barrier core. Performance of TAB barrier is compared to canonical algorithms and former solution, and almost 20% time is saved during off-centered scenarios with marginal area and power overhead.
Keywords :
multiprocessing systems; network-on-chip; parallel programming; synchronisation; NoC-based processor; TAB barrier; barrier core; barrier message; canonical algorithm; hybrid barrier synchronization; hybrid tree-based all-to-all barrier; many-core processor; master-slave barrier; multicore processor; network-on-chip; parallel programming; performance degradation; tree barrier; Hardware; Merging; Multicast communication; Multicore processing; Program processors; Synchronization; System-on-chip; Barrier Synchronization; Critical Path; NoC; Synchronization Controller;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7168657
