SPI interface, mux-based synchronizer and DSP unit for a MEMS-based accelerometer

This paper presents an SPI interface, a mux-based synchronizer and a DSP block designed for a 2-axis accelerometer IC. The SPI interface is used for writing trim bits to the IC and reading acceleration data. Clock output pin is omitted and data can only be read asynchronously. The synchronizer improves the mean time between failures (MTBF) when multi-bit acceleration data is moved from the domain of an on-chip clock to an SPI master device. Estimated MTBF of the synchronizer is 2.2·10⁴⁶⁸ years. The DSP block decimates 1-bit acceleration data coming from two 1-bit ΔΣ AD converters, increases their word lengths and reduces offset and gain errors induced by process variation. The blocks have been implemented in a 0.35 μm CMOS process and their measured dynamic current consumption is 11.8 μA from a 3.3 V supply.