A one-shot digital correlated double sampling with a differential difference amplifier for a high speed CMOS image sensor

In order to raise the operating speed of a CMOS image sensor (CIS), a new technique of digital correlated double sampling (CDS) is described. In general, a fixed pattern noise (FPN) of a CIS has been reduced with the subtraction algorithm between the reset signal and pixel signal. This is because a single-slope analog-to-digital converter (ADC) has been normally adopted in the conventional digital CDS with the reset ramp and signal ramp. Thus, the operating speed of a digital CDS is much slower than that of an analog CDS. In order to improve the operating speed, we propose a one-shot digital CDS based on a differential difference amplifier (DDA) that compares the reset signal and the pixel signal using only one ramp. The prototype CIS has been fabricated with 0.13μm CIS technology and it has the VGA resolution of 640×480. The measured conversion time is 16 μs, and a high frame rate of 131fps is achieved at the VGA resolution.