DocumentCode :
727116
Title :
A 512×512-cell associative CAM/Willshaw memory with vector arithmetic
Author :
Laiho, Mika ; Poikonen, Jonne K. ; Lehtonen, Eero ; Pankaala, Mikko ; Poikonen, Jussi H. ; Kanerva, Pentti
Author_Institution :
Technol. Res. Center, Univ. of Turku, Turku, Finland
fYear :
2015
fDate :
24-27 May 2015
Firstpage :
1350
Lastpage :
1353
Abstract :
In this paper we present a CMOS implementation of a 512×512-cell Associative Content Addressable Memory (ACAM) in 180 nm CMOS. The memory can be operated either as an associative CAM or it can be configured into a Willshaw memory for operating with sparse data. The vector matching operation can use a tunable hit threshold or the strongest hit can be selected with a winner-take-all (WTA) network. Built-in row and column circuitry can perform logic operations on the contents of the row and column memories. The operation of the circuit is verified experimentally with an example on computing with random vectors.
Keywords :
CMOS memory circuits; content-addressable storage; CMOS; WTA network; Willshaw memory; associative content addressable memory; cell ACAM; complementary metal oxide semiconductor; logic operation; size 180 nm; sparse data; tunable hit threshold; vector arithmetic; vector matching operation; winner-take-all netwok; Arrays; Computer aided manufacturing; Current measurement; Latches; Radio frequency; Semantics; Transistors; Willshaw memory; analog signal processing; associative memory; content addressable memory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
Type :
conf
DOI :
10.1109/ISCAS.2015.7168892
Filename :
7168892
Link To Document :
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