DocumentCode :
727122
Title :
A multi-core architecture of digital back-end for large mutual capacitance touch sensing systems
Author :
Yamada, Akihisa ; Yan Qian ; Yamaguchi, Masayuki ; Honjoh, Hiroshi ; Morishita, Takahiro ; Nagasawa, Shunsuke ; Shinjo, Shinji ; Miyamoto, Masayuki
Author_Institution :
Sharp Corp., Fukuyama, Japan
fYear :
2015
fDate :
24-27 May 2015
Firstpage :
1382
Lastpage :
1385
Abstract :
In this paper, a multi-core architecture suitable for digital back-end processing for medium size or large size mutual capacitance touch sensing systems is proposed. The proposed architecture achieves both high efficiency and flexibility by combining software on CPUs with dedicated circuits for heavy computation tasks, which can realize digital back-end for 10-100 inch touch sensors with the unified architecture. Two ASICs and an FPGA have been implemented and the ASICs are under mass production.
Keywords :
application specific integrated circuits; capacitance measurement; capacitive sensors; field programmable gate arrays; multiprocessing systems; size measurement; tactile sensors; ASIC; CPU; FPGA; digital back-end processing; multicore architecture; mutual capacitance touch sensing system; size 10 inch to 100 inch; Capacitance; Computational complexity; Computer architecture; Noise; Software; Tactile sensors; digital back-end; multi-core architecture; touch controller;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
Type :
conf
DOI :
10.1109/ISCAS.2015.7168900
Filename :
7168900
Link To Document :
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