• DocumentCode
    727184
  • Title

    XOR-decomposition principle and its use to build a glitch-free maximum-speed arbitrary binary waveform generator and deglitcher

  • Author

    Pedroni, Volnei A.

  • Author_Institution
    Fed. Technol. Univ. of Parana State, Curitiba, Brazil
  • fYear
    2015
  • fDate
    24-27 May 2015
  • Firstpage
    1834
  • Lastpage
    1837
  • Abstract
    Arbitrary binary waveforms are needed for chip testing and for operating complexly-controlled devices. Such signals are required to be glitch-free and might have to be as fast as the fastest clock available, thus with transitions coinciding with both positive and negative clock edges, which prevents the use of conventional (by means of D-type flip-flops) deglitching of the generated signals. This paper introduces the XOR-decomposition principle, which allows any binary waveform to be decomposed into two other waveforms, each with half the frequency of the original (decomposed) signal, hence with transitions at only one of the clock edges, which then makes the use of conventional deglitching possible. This principle is used to build an inexpensive, glitch-free, maximum-speed, arbitrary binary waveform generator. It is also extended subsequently to build an inexpensive deglitcher for any max-speed binary waveform. Both solutions are standard (application-independent), with proper time predictability, suited for both VLSI- and FPGA-based implementations. Experimental results from FPGA implementations using VHDL are also reported.
  • Keywords
    VLSI; field programmable gate arrays; hardware description languages; logic circuits; logic testing; FPGA-based implementations; VHDL; VLSI-based implementations; XOR-decomposition; chip testing; complexly-controlled devices; deglitcher; glitch-free maximum-speed arbitrary binary waveform generator; Clocks; Delays; Field programmable gate arrays; Multiplexing; Signal generators; Standards; Table lookup; XOR decomposition; arbitrary waveform generator; binary waveform; deglitcher; glitch free;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
  • Conference_Location
    Lisbon
  • Type

    conf

  • DOI
    10.1109/ISCAS.2015.7169013
  • Filename
    7169013