• DocumentCode
    727185
  • Title

    A study for replacing CMOS gates by equivalent inverters

  • Author

    Galani, Ch. ; Tsormpatzoglou, A. ; Chaourani, P. ; Messaris, I. ; Nikolaidis, S.

  • Author_Institution
    Department of Physics, Aristotle University of Thessaloniki, 54124, Thessaloniki, Greece
  • fYear
    2015
  • fDate
    24-27 May 2015
  • Firstpage
    1838
  • Lastpage
    1841
  • Abstract
    Analysis of the operation of CMOS gates is a complicated procedure. These gates can be replaced by equivalent inverters and therefore the expressions for the inverters are used to determine the electrical characteristics of the gates. In this paper, the equivalent inverter approach for replacing CMOS gates is evaluated. The NAND gate is used for this evaluation. Parametric expressions are created to determine the transistors widths of the equivalent inverter. A systematic method is used for incorporating the parameter dependencies in the expressions. Results verify the accuracy of this approach.
  • Keywords
    Delays; Integrated circuit modeling; Inverters; Logic gates; MOSFET; Semiconductor device modeling; Equivalent inverter; Gate modeling; Simulation; Timing analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
  • Conference_Location
    Lisbon, Portugal
  • Type

    conf

  • DOI
    10.1109/ISCAS.2015.7169014
  • Filename
    7169014