Title :
MIL-STD-1553+: Integrated remote terminal and bus controller at 100-Mb/s data rate
Author :
Pendyala, Prateek ; Pasupureddi, Vijaya Sankara Rao
Author_Institution :
Center for VLSI & Embedded Syst., Int. Inst. of Inf. Technol., Hyderabad, India
Abstract :
This work proposes an integrated remote terminal and bus controller: MIL-STD-1553+, implemented in 1.2 V 65-nm CMOS technology occupying 115470 μm2 of area. It incorporates a synchronous back-end and host processor interface to a true dual port memory for faster memory accesses. Employing a majority-based sampling free-running decoder at its front-end and scaled-up protocol state machines in its control unit, this redesigned controller achieves 100-Mb/s with BER of 10-7 over 1553 buses, consuming a total power of 29.86 mW.
Keywords :
CMOS integrated circuits; field buses; finite state machines; CMOS technology; MIL-STD-1553+; bit rate 100 Mbit/s; host processor interface; integrated remote terminal and bus controller; majority-based sampling free-running decoder; power 29.86 mW; synchronous back-end; true dual port memory; voltage 1.2 V; CMOS integrated circuits; Clocks; Decoding; Military standards; Process control; Protocols; Throughput;
Conference_Titel :
Circuits and Systems (ISCAS), 2015 IEEE International Symposium on
Conference_Location :
Lisbon
DOI :
10.1109/ISCAS.2015.7169015
