An improved recycling folded cascode amplifier with gain boosting and phase margin enhancement

Author

Ahmed, Moaaz ; Shah, Ikramullah ; Fang Tang ; Bermak, Amine

Author_Institution

Dept. of ECE, Hong Kong Univ. of Sci. & Technol., Hong Kong, China

fYear

2015

fDate

24-27 May 2015

Firstpage

2473

Lastpage

2476

Abstract

An improved recycling folded cascode operational transconductance amplifier with gain boosting and enhanced phase-margin is proposed. Among four variants of folded cascode amplifiers that have been implemented in TSMC 0.18μm CMOS process under same power and area constraints, the proposed amplifier achieves the lowest settling error of less than 0.5% compared to 1.1% settling error by Improved Recycling Folded Cascode (IRFC), 1.4% settling error by Recycling Folded Cascode (RFC) and 30% settling error by conventional Folded Cascode (FC) amplifier. This performance enhancement is attributed to 30dB increment in low-frequency gain and 7° improvement in the phase margin when compared with the second best performing Improved Recycling Folded Cascode amplifier.

Keywords

CMOS integrated circuits; operational amplifiers; TSMC CMOS process; gain boosting; improved recycling folded cascode amplifier; low-frequency gain; operational transconductance amplifier; phase margin enhancement; settling error; size 0.18 mum; CMOS process; Gain; Mirrors; Noise; Recycling; Transconductance; Transistors; Gain boosting; Improved recycling folded cascode amplifier; phase margin enhancement;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems (ISCAS), 2015 IEEE International Symposium on

Conference_Location

Lisbon

Type

conf

DOI

10.1109/ISCAS.2015.7169186

Filename

7169186