Title :
Efficiency optimized 60 GHz CMOS Power amplifier for high PAPR signals
Author :
Akbarpour, Mohammadhassan ; Helaoui, Mohamed ; Ghannouchi, Fadhel M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
Abstract :
In this paper, a 60 GHz power amplifier is presented in 65nm CMOS technology based on the transformerless load-modulated (TLLM) amplifier architecture. It is designed to obtain high efficiency at output power back-off. The amplifier has 12.5 dB small signal gain and 11.5 dBm saturated output power. Measurement results show that this amplifier has more than 8% drain efficiency (7% power-added efficiency) in the last 6 dB output power range.
Keywords :
CMOS integrated circuits; field effect MIMIC; millimetre wave power amplifiers; efficiency optimized CMOS power amplifier; frequency 60 GHz; gain 12.5 dB; high PAPR signals; transformerless load modulated amplifier; CMOS integrated circuits; CMOS technology; Gain; Power amplifiers; Power generation; Transistors; Transmission line measurements; 60 GHz; CMOS; Doherty; Efficiency; PAPR; Power Amplifier; TLLM; mmW;
Conference_Titel :
Millimeter Waves (GSMM), 2015 Global Symposium On
Conference_Location :
Montreal, QC
DOI :
10.1109/GSMM.2015.7175445
