• DocumentCode
    729267
  • Title

    Impact of SMT-induced edge dislocation positions to NFET performance

  • Author

    Tzer-Min Shen ; Shui-Jinn Wang ; Zhi-Ren Xiao ; Chung-Cheng Wu ; Wu, Jeff ; Diaz, Carlos H.

  • Author_Institution
    Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
  • fYear
    2015
  • fDate
    21-24 June 2015
  • Firstpage
    184
  • Lastpage
    184
  • Abstract
    This work highlights the impact of SMT-induced edge-dislocation positions in nFET device design. Based on experimental results and atomic transport simulation, dislocations with reduced proximity and depth would increase the amount of SFs and TDs which induce high parasitic resistance and high Iboff leakage current together. Trade-off among strained mobility, parasitic resistance and Iboff should be made for advanced device design.
  • Keywords
    MOSFET; edge dislocations; leakage currents; semiconductor device models; NFET performance; SMT-induced edge dislocation positions; atomic transport simulation; dislocations; leakage current; nFET device design; parasitic resistance; strained mobility; stress memorization technique; Atomic measurements; Crystals; Logic gates; Resistance; Silicon; Stacking; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Device Research Conference (DRC), 2015 73rd Annual
  • Conference_Location
    Columbus, OH
  • Print_ISBN
    978-1-4673-8134-5
  • Type

    conf

  • DOI
    10.1109/DRC.2015.7175621
  • Filename
    7175621
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=729267