Title :
Performance enhancement of InAsSb QW-MOSFETs with in-situ H2 plasma cleaning for gate stack formation
Author :
Barth, M. ; Rayner, G.B. ; Mack, S. ; Bennett, B.R. ; Datta, S.
Author_Institution :
Pennsylvania State Univ., University Park, PA, USA
Abstract :
The measured split capacitance-voltage (CV) characteristics are shown. The combination of an in-situ H2 plasma cleaned GaSb cap with a scaled 4.5 nm thick HfO2 gate dielectric results in higher Cox versus the ex-situ HCl cleaned 1 nm Al2O3/10 nm HfO2 gate stack. Fig. 5 shows the transfer characteristics (ID-VG) of the InAs0.8Sb0.2 QW-MOSFETs with an LG=5 μm. The ON current of the long channel MOSFET is 30 μA/μm with a peak Gm of 100 μS/μm and threshold voltage of -0.2V. The SS slope is calculated to be 215 mV/dec. It is evident that the in-situ H2 plasma clean results in a 35% improvement over similar QW-MOSFET devices that used an ex-situ HCl clean (SS= 350 mV/dec) [1] (Fig. 9). Fig. 5 shows the corresponding output characteristics (ID-VD) exhibiting current saturation at low gate voltages. However, external access resistance dominates ID-VD characteristics at high VG. The access resistance was calculated to be REXT= 5.8 kΩ-μm (Fig. 7). The effective mobility corrected for access resistance as a function of carrier density is shown in Fig. 8. The in-situ H2 plasma processed MOSFET exhibits a peak mobility of 4,000 cm2/Vs which represents an increase of 17.5× over Si NMOSFET. In summary, we have demonstrated a 35% improvement in subthreshold slope for InAs0.8 Sb0.2 QW-MOSFET by using in-situ H2 plasma to create a high quality interface between GaSb and HfO2 over the ex-situ cleaned counterpart The resulting InAs 0.8 Sb 0.2 QW-MOSFET shows 17.5x increase in electron mobility over present day silicon MOSFETs.
Keywords :
MOSFET; electron mobility; plasma materials processing; semiconductor quantum wells; surface cleaning; GaSb; HfO2; InAsSb; QW-MOSFET; effective mobility; electron mobility; external access resistance; gate stack formation; high quality interface; in-situ hydrogen plasma cleaning; performance enhancement; subthreshold slope; Capacitance-voltage characteristics; Logic gates; MOSFET; MOSFET circuits; Physics; Quantum wells;
Conference_Titel :
Device Research Conference (DRC), 2015 73rd Annual
Conference_Location :
Columbus, OH
Print_ISBN :
978-1-4673-8134-5
DOI :
10.1109/DRC.2015.7175668