Optimum design of a miniaturized onchip wide band power divider-combiner combined with impedance transformer

In this paper a design procedure for Monolithic Microwave Integrated Circuit (MMIC) power divider based on lumped components is proposed. Its circuit model is used to present a design procedure based on the Method of Least Squares (MLS) which has been developed to include the appropriate dispersion models and the dissipation effects. The conversions among the impedance and scattering matrices based on circuit analysis are used to find expressions for outputs, reflection and transmission coefficients (as scattering parameters) for the construction of an error function whose minimization is performed by the combination of genetic algorithm and conjugate gradient method (to benefit from their advantages and avoid their shortcoming) which gives the value of each component of the optimum design of the on chip power divider. The proposed design method has been applied to design two examples of the lumped component power divider, one of which has been fabricated on SiGe BiCMOS. Comparison of the frequency responses of the MMIC power divider as obtained by the MLS method, full-wave simulation and measurement data indicate that the circuit configuration proposed for the on chip power divider model and the MLS design procedure are effective and have applications in microwave circuits.