Title :
1.32GHz high-throughput charge-recovery AES core with resistance to DPA attacks
Author :
Shengshuo Lu ; Zhengya Zhang ; Papaefthymiou, Marios
Author_Institution :
Univ. of Michigan, Ann Arbor, MI, USA
Abstract :
A 128-bit Advanced Encryption Standard (AES) core targeted for high-performance security applications is fabricated in a 65nm CMOS technology. A novel charge-recovery logic family, called Bridge Boost Logic (BBL), is introduced in this design to achieve switching-independent energy dissipation for an intrinsic high resistance against Differential Power Analysis (DPA) attacks. Based on measurements, the AES core achieves a throughput of 16.90Gbps and power consumption of 98mW, exhibiting 720× higher DPA resistance and 30% lower power than its conventional CMOS counterpart at the same clock frequency.
Keywords :
CMOS integrated circuits; bridge circuits; cryptography; logic gates; AES core; BBL; CMOS technology; DPA attacks; DPA resistance; advanced encryption standard core; bit rate 16.90 Gbit/s; bridge boost logic; charge-recovery logic family; differential power analysis attacks; frequency 1.32 GHz; high-performance security applications; power 98 mW; size 65 nm; storage capacity 128 bit; switching-independent energy dissipation; Bridge circuits; CMOS integrated circuits; Clocks; Logic gates; Resistance; Switches; Switching circuits;
Conference_Titel :
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-4-86348-502-0
DOI :
10.1109/VLSIC.2015.7231274
