• DocumentCode
    735276
  • Title

    A robust −40 to 120°C all-digital true random number generator in 40nm CMOS

  • Author

    Kaiyuan Yang ; Blaauw, David ; Sylvester, Dennis

  • Author_Institution
    Univ. of Michigan, Ann Arbor, MI, USA
  • fYear
    2015
  • fDate
    17-19 June 2015
  • Abstract
    An all-digital True Random Number Generator (TRNG) harvesting entropy from the collapse of 2 edges injected into one even-stage ring is fabricated in 40nm CMOS. A configurable ring and tuning loop provides robustness across a wide range of temperature (-40 to 120°C), voltage (0.6 to 0.9V), process variation, and external attack. The dynamic tuning loop automatically configures the ring to meet a sufficient collapse time, thereby maximizing entropy. All dies pass all NIST randomness tests across all measured operating conditions and power supply attacks. The all-digital TRNG occupies only 836μm2 and consumes 23pJ/bit at nominal 0.9V and 11pJ/bit at 0.6V.
  • Keywords
    CMOS integrated circuits; CMOS logic circuits; entropy; random number generation; CMOS; all-digital true random number generator; configurable ring; dynamic tuning loop; temperature -40 degC to 120 degC; voltage 0.6 V to 0.9 V; Entropy; NIST; Noise; Oscillators; Robustness; Temperature measurement; Tuning;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits (VLSI Circuits), 2015 Symposium on
  • Conference_Location
    Kyoto
  • Print_ISBN
    978-4-86348-502-0
  • Type

    conf

  • DOI
    10.1109/VLSIC.2015.7231275
  • Filename
    7231275