Title :
Active-lite interposer for 2.5 & 3D integration
Author :
Hellings, G. ; Scholz, M. ; Detalle, M. ; Velenis, D. ; de Potter de ten Broeck, M. ; Neve, C.Roda ; Li, Y. ; Van Huylenbroek, S. ; Chen, S.-H. ; Marinissen, E.-J. ; Manna, A.La ; Van der Plas, G. ; Linten, D. ; Beyne, E. ; Thean, A.
Author_Institution :
imec, Leuven, Belgium
Abstract :
Adding functionality to a passive Si interposer used in 2.5/3D integration, can result in system cost reductions. In this work, active components (diodes, BJT, …) have been integrated on Si interposer using a new low-mask process flow. This low-cost process enables: (1) to move part of the area hungry ESD protection from the stacked dies to the interposer; (2) the realization of pre-bond testable interposers (DFT); and (3) components for analog circuits (diodes, npn, SCR, resistor).
Keywords :
Clamps; Electrostatic discharges; Field programmable gate arrays; FinFETs; Implants; Silicon; Testing;
Conference_Titel :
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
978-4-86348-502-0
DOI :
10.1109/VLSIC.2015.7231374
