• DocumentCode
    738614
  • Title

    Quantum Well InAs/AlSb/GaSb Vertical Tunnel FET With HSQ Mechanical Support

  • Author

    Yuping Zeng ; Chien-I Kuo ; Chingyi Hsu ; Najmzadeh, Mohammad ; Sachid, Angada ; Kapadia, Rehan ; Chunwing Yeung ; Chang, Edward ; Chenming Hu ; Javey, Ali

  • Author_Institution
    Electr. Eng. & Comput. Sci. Dept., Univ. of California, Berkeley, Berkeley, CA, USA
  • Volume
    14
  • Issue
    3
  • fYear
    2015
  • fDate
    5/1/2015 12:00:00 AM
  • Firstpage
    580
  • Lastpage
    584
  • Abstract
    A type-III (broken gap) band alignment heterojunction vertical in-line InAs/AlSb/GaSb tunnel FET, including a 2-nm-thin AlSb tunneling barrier is demonstrated. The impact of overlap and underlap gate is studied experimentally and supported further by quasi-stationary 2-D TCAD Sentaurus device simulations. Hydrogen silsesquioxane is used as a novel mechanical support structure to suspend the 10-nm-thin InAs drain with enough undercut to be able to demonstrate an overlap gate architecture. The overlap gate InAs/AlSb/GaSb TFET shows an ON current density of 22 μA/μm2 at VGS = VDS = 0.4 V and the subthreshold slope is 194 mV/decade at room temperature and 46 mV/decade at 100 K.
  • Keywords
    III-V semiconductors; aluminium compounds; current density; electron resists; gallium compounds; high electron mobility transistors; hydrogen compounds; indium compounds; quantum well devices; semiconductor heterojunctions; semiconductor quantum wells; technology CAD (electronics); tunnel transistors; HSQ mechanical support structure; InAs-AlSb-GaSb-H8Si8O12; ON current density; hydrogen silsesquioxane; overlap gate architecture; quantum well vertical tunnel FET; quasistationary 2D TCAD Sentaurus device simulations; size 2 nm; subthreshold slope; temperature 100 K; temperature 293 K to 298 K; tunneling barrier; type-III band alignment heterojunction vertical in-line tunnel FET; underlap gate; Field effect transistors; Heterojunctions; Logic gates; Performance evaluation; Tunneling; Heterojunction; Nanofabrication; TCAD simulation; Tunneling barrier; Type III (broken gap) band alignment,; Vertical in-line Tunnel FET; nanofabrication; tunneling barrier; type III (broken gap) band alignment; vertical in-line tunnel FET;
  • fLanguage
    English
  • Journal_Title
    Nanotechnology, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1536-125X
  • Type

    jour

  • DOI
    10.1109/TNANO.2015.2419232
  • Filename
    7081361