DocumentCode
738711
Title
Investigation and Improvement of Verify-Program in Carbon Nanotube-Based Nonvolatile Memory
Author
Sheyang Ning ; Iwasaki, Tomoko Ogura ; Shimomura, Kazuya ; Johguchi, Koh ; Yanagizawa, Eisuke ; Rosendale, Glen ; Manning, Monte ; Viviani, Darlene ; Rueckes, Thomas ; Takeuchi, Ken
Author_Institution
Dept. of Electr., Electron., & Commun. Eng., Chuo Univ., Tokyo, Japan
Volume
62
Issue
9
fYear
2015
Firstpage
2837
Lastpage
2844
Abstract
Carbon nanotube (CNT)-based random access memory (NRAM) cells are measured to investigate cell program at different set current compliances and temperatures. Then, a physical model is proposed to explain the mechanism of cell resistance switching. Specifically, the changes in the NRAM cell tunneling current and resistance can be attributed to the variation of the distance between CNTs. An attraction force (Fattraction), generated by electrical induction, reduces the distance, whereas a repulsion force (Frepulsion), generated by phonon-induced temperature, increases the distance. It is proposed that the dominance of these two forces is reversed during set and reset programs, possibly due to the reduction of Frepulsion in set program. Finally, two verify-reset schemes are proposed to improve the NRAM cell verify-program performance. The first proposal, multiple-pulse reset demonstrates 23% program time reduction by skipping a cell resistance read between two successive reset pulses. The second proposal, gate-pulse reset is calculated to decrease more than 40% program energy by reducing bitline charge energy in array program.
Keywords
carbon nanotubes; random-access storage; bitline charge energy; carbon nanotube-based nonvolatile memory; cell resistance switching; electrical induction; gate-pulse reset; phonon-induced temperature; random access memory cells; tunneling current; tunneling resistance; Current measurement; Electrical resistance measurement; Proposals; Resistance; Switches; Temperature measurement; Voltage measurement; Carbon nanotube (CNT); nonvolatile memory; resistance switching; verify-program; verify-program.;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2015.2450219
Filename
7163345
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