Title :
The New High-Efficiency Hybrid Neutral-Point-Clamped Converter
Author :
Soeiro, Thiago Batista ; Kolar, Johann Walter
Author_Institution :
Power Electron. Syst. Lab., ETH Zurich, Zurich, Switzerland
fDate :
5/1/2013 12:00:00 AM
Abstract :
This paper introduces a novel three-level voltage-source converter (VSC) as an alternative to known three-level topologies, including the conventional neutral-point-clamped converter (NPCC), many T-type VSCs, and active NPCC. It is shown that, operating in the low converter dc-link voltage range, this new solution not only can achieve higher efficiency than many typical three-level structures but also can overcome their drawback of asymmetrical semiconductor loss distribution for some operating conditions. Therefore, a remarkable increase of the converter output power capability and/or system reliability can be accomplished. The switching states and commutations of the converter, named here as hybrid NPCC (H-NPCC), are analyzed, and a loss-balancing scheme is introduced. Five- and seven-level H-NPCC topologies with loss-balancing features are also presented. Finally, a semiconductor-area-based comparison is used to further evaluate many three-level VSC systems. Interestingly, the total chip area of the proposed H-NPCC is already the lowest for low switching frequencies.
Keywords :
losses; power convertors; DC-link voltage converter; H-NPCC topology; VSC; asymmetrical semiconductor loss distribution; converter output power capability; high-efficiency hybrid neutral-point-clamped converter; loss-balancing scheme; system reliability; three-level voltage-source converter; Clamps; Modulation; Power conversion; Switches; Topology; Vectors; Neutral-point-clamped converter (NPCC); space vector modulation (SVM); three-level voltage-source converters (VSCs);
Journal_Title :
Industrial Electronics, IEEE Transactions on
DOI :
10.1109/TIE.2012.2209611