DocumentCode :
739704
Title :
Split-Capacitance and Conductance-Frequency Characteristics of SOI Wafers in Pseudo-MOSFET Configuration
Author :
Pirro, Luca ; Diab, Amer ; Ionica, Irina ; Ghibaudo, Gerard ; Faraone, Lorenzo ; Cristoloveanu, Sorin
Author_Institution :
IMEP, Univ. Grenoble Alpes, Grenoble, France
Volume :
62
Issue :
9
fYear :
2015
Firstpage :
2717
Lastpage :
2723
Abstract :
Recent experimental results have demonstrated the possibility of characterizing silicon-on-insulator (SOI) wafers through split C-V measurements in the pseudo-MOSFET configuration. This paper analyzes the capacitance and conductance versus frequency characteristics. We discuss the conditions under which it is possible to extract interface trap density in bare SOI wafers. The results indicate, through both measurements and simulations, that the signature due to interface trap density is present in small-area samples, but is masked by the RC response of the channel in regular, large-area ones, making the extraction in standard samples problematic.
Keywords :
MOSFET; interface states; semiconductor device models; silicon-on-insulator; SOI wafers; Si; conductance-frequency characteristics; interface trap density; pseudoMOSFET configuration; silicon-on-insulator wafers; split C-V measurements; split-capacitance; Capacitance; Capacitance measurement; Frequency measurement; Logic gates; Probes; Semiconductor device modeling; Silicon; $RC$ model; Frequency dependence; RC model; mobility; pseudo-MOSFET ( $Psi $ -MOSFET); pseudo-MOSFET (Ψ-MOSFET); silicon on insulator (SOI); split $C$ ??? $V$; split C-V.;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/TED.2015.2454438
Filename :
7180361
Link To Document :
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