DocumentCode
740230
Title
Correction to "A 0.016 mm² 144-µW Three-Stage Amplifier Capable of Driving 1-to-15 nF Capacitive Load With >0.95-MHz GBW"
Author
Yan, Zhennan ; Mak, Pui-In ; Law, Man-Kay ; Martins, Rui P.
Author_Institution
State Key Laboratory of Analog and Mixed-Signal VLSI and FST-ECE, University of Macau, Macao, China
Volume
48
Issue
6
fYear
2013
fDate
6/1/2013 12:00:00 AM
Firstpage
1539
Lastpage
1539
Abstract
In the above-named article [ibid., vol. 48, no. 2, pp. 527-540, Feb. 2013], US Patent 7,646,247 (Jan. 12, 2010) was cited in the description of Fig. 8, for a more general description about the utilization and advantages of the Gma stage. However, the article by U. Dasgupta "Issues in "Ahuja" frequency compensation technique," (Proc. IEEE Int. Symp. Radio-Frequency Integration Technology, 2009, pp. 326-329) exhibits the circuit implementation of the Gma stage (improved Ahuja compensation circuit), which, for that reason, should have been referenced for completeness, as well. The authors would like to thank Dr. U. Dasgupta for pointing out this missing information.
Keywords
Circuit analysis; Feedback loop; Limiting; Poles and zeros; Stability analysis; Standards;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/JSSC.2013.2254553
Filename
6510471
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