A 10-Bit DAC With 1.6-Bit Interpolation Cells for Compact LCD Column Driver ICs

Author

Chih-Wen Lu ; Ching-Min Hsiao ; Yo-Sheng Lin ; Chang, Mau-Chung Frank

Author_Institution

Dept. of Eng. & Syst. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan

Volume

9

Issue

3

fYear

2013

fDate

3/1/2013 12:00:00 AM

Firstpage

176

Lastpage

183

Abstract

This paper proposes a 10-bit DAC for LCD column driver ICs. This architecture achieves 10-bit resolution with a compact die size smaller than that of a conventional 8-bit resistor-string DAC (RDAC). The proposed DAC combines a 6-bit RDAC and a 4-bit DAC-embedded op with 1.6-bit current-mode interpolation cells. The 6-bit RDAC uses a one-voltage selector instead of a two-voltage selector; therefore, it requires a smaller silicon die area for the voltage selector. Fewer differential pairs are required for the voltage interpolation because the DAC-embedded op uses 1.6-bit interpolation cells with binary-weighted reference voltages. This further reduces the silicon die area. The 10-bit DAC prototype was realized in 0.35-μm CMOS technology with the worst DNL/INL of 0.45/0.93 LSB. The 10-bit DAC occupies only 64% of the conventional 8-bit RDAC area.

Keywords

CMOS analogue integrated circuits; digital-analogue conversion; driver circuits; integrated circuits; liquid crystal displays; CMOS technology; RDAC; binary-weighted reference voltages; compact LCD column driver IC; current-mode interpolation cells; resistor-string DAC; size 0.35 mum; two-voltage selector; word length 1.6 bit; word length 10 bit; word length 4 bit; word length 6 bit; word length 8 bit; Converters; DC-AC power converters; Embedded systems; Liquid crystal displays; Column driver; DAC; DAC-embedded op; LCD;

fLanguage

English

Journal_Title

Display Technology, Journal of

Publisher

ieee

ISSN

1551-319X

Type

jour

DOI

10.1109/JDT.2012.2236679

Filename

6459556