• DocumentCode
    742283
  • Title

    CASSER: A Closed-Form Analysis Framework for Statistical Soft Error Rate

  • Author

    Chang, Austin C.-C ; Huang, Ryan H.-M ; Wen, Charles H.-P

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • Volume
    21
  • Issue
    10
  • fYear
    2013
  • Firstpage
    1837
  • Lastpage
    1848
  • Abstract
    CMOS designs in the deep submicrometer era require statistical methods to accurately estimate the circuit soft error rate (SER). However, process variation increases the complexity of statistical characteristics related to transient faults, leading to considerable uncertainty in the behavior of soft errors. Regardless of the methods used, current statistical SER (SSER) frameworks invariably involve a tradeoff between accuracy and efficiency. This paper presents accurate cell models in first-order closed form to overcome this problem, thereby enabling the analysis of SSERs in a block-based fashion similar to statistical static timing analysis. These cell models are derived as a closed form in the proposed framework named CASSER, and remain precise under the assumption of a normal distribution for the process parameters. Experimental results demonstrate the efficiency (> 2-order times faster than the latest framework) and accuracy ( error) of CASSER in estimating circuit SERs, when compared with the Monte Carlo SPICE simulation.
  • Keywords
    CMOS integrated circuits; integrated circuit design; normal distribution; radiation hardening (electronics); CASSER; CMOS designs; Monte Carlo SPICE simulation; cell models; closed-form analysis framework; deep submicrometer era; first-order closed form; normal distribution; process parameters; process variation; statistical methods; statistical soft error rate; statistical static timing analysis; transient faults; Accuracy; Circuit faults; Integrated circuit modeling; Logic gates; Random variables; Timing; Transient analysis; Reliability; single event upset; statistical SER (SSER); statistical static timing analysis (SSTA); transient fault;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2012.2220386
  • Filename
    6341119