• DocumentCode
    745095
  • Title

    Cascaded Bayesian inferencing for switching activity estimation with correlated inputs

  • Author

    Bhanja, Sanjukta ; Ranganathan, Nagarajan

  • Author_Institution
    Univ. of South Florida, Tampa, FL, USA
  • Volume
    12
  • Issue
    12
  • fYear
    2004
  • Firstpage
    1360
  • Lastpage
    1370
  • Abstract
    In this paper, we investigate the estimation of switching activity in VLSI circuits using a graphical probabilistic model based on cascaded Bayesian networks (CBNs). First, we develop a theoretical analysis for Bayesian inferencing of switching activity and then derive upper bounds for certain circuit parameters which, in turn, are useful in establishing the cascade structure of the CBN model. We formulate an elegant framework for maintaining probabilistic consistency in the interfacing boundaries across the CBNs during the inference process using a tree-dependent (TD) probability distribution function. A TD distribution is an approximation of the true joint probability function over the switching variables, with the constraint that the underlying BN representation is a tree. The tree approximation of the true joint probability function can be arrived at by using a maximum weight spanning tree (MWST) built using pairwise mutual information about the switching occurring at pairs of signal lines on the boundary. Further, we show that the proposed TD distribution function can be used to model correlations among the primary inputs which is critical for accuracy in modeling of switching activity. Experimental results for ISCAS circuits are presented to illustrate the efficacy of the proposed CBN models.
  • Keywords
    Bayes methods; VLSI; approximation theory; belief networks; boundary-value problems; cascade networks; circuit complexity; circuit switching; electronic engineering computing; estimation theory; inference mechanisms; statistical analysis; statistical distributions; trees (mathematics); ISCAS circuits; VLSI circuits; cascaded Bayesian inference methods; cascaded Bayesian networks; circuit complexity; circuit parameters; correlation inputs; graphical probabilistic model; maximum weight spanning tree; pairwise mutual information; probability distribution function; switching activity estimation; switching activity modeling; switching variables; tree approximation; tree dependent distribution; true joint probability function; upper bounds; Bayesian methods; Combinational circuits; Delay estimation; Mutual information; Parameter estimation; Probability distribution; Random variables; Switching circuits; Upper bound; Very large scale integration; Bayesian inferencing; dynamic power dissipation; power estimation; switching activity;
  • fLanguage
    English
  • Journal_Title
    Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1063-8210
  • Type

    jour

  • DOI
    10.1109/TVLSI.2004.837991
  • Filename
    1407954