DocumentCode :
745119
Title :
Fault isolation for nonisolated blocks
Author :
Pomeranz, Irith ; Zorian, Yervant
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Volume :
12
Issue :
12
fYear :
2004
Firstpage :
1385
Lastpage :
1388
Abstract :
We consider circuits represented as interconnections of logic blocks. In such circuits, the goal of fault isolation is to identify which one of the blocks is faulty based on a faulty output response produced by the circuit. We study this issue and demonstrate that perfect or close-to-perfect fault isolation is possible with tests that propagate fault effects through pairs of blocks. We relate this phenomenon to the numbers of fault effects observed on the circuit outputs for faults in different blocks. For cases where fault isolation is not perfect, we insert observation points to ensure perfect fault isolation. We also study the number of tests required to achieve perfect fault isolation. The study is performed for single stuck-at faults in combinational (or full scan) blocks.
Keywords :
combinational circuits; fault diagnosis; interconnections; logic testing; combinational blocks; fault isolation; logic block interconnection; nonisolated blocks; stuck-at faults; Automatic testing; Circuit faults; Circuit testing; Delay; Design automation; Design methodology; Europe; Fault diagnosis; Integrated circuit interconnections; Logic circuits; Fault diagnosis; fault isolation; test-points;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2004.837994
Filename :
1407959
Link To Document :
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