DocumentCode :
745472
Title :
Modeling and analysis of 96.5Sn-3.5Ag lead-free solder joints of wafer level chip scale package on buildup microvia printed circuit board
Author :
Lau, John H. ; Lee, S. Ricky W
Author_Institution :
Agilent Technol. Inc., Palo Alto, CA, USA
Volume :
25
Issue :
1
fYear :
2002
fDate :
1/1/2002 12:00:00 AM
Firstpage :
51
Lastpage :
58
Abstract :
In this study, time-temperature-dependent nonlinear analyses of lead-free solder bumped wafer level chip scale package (WLCSP) on microvia buildup printed circuit board (PCB) assemblies subjected to thermal cycling conditions are presented. The lead-free solder considered is 96.5Sn-3.5Ag. The 62Sn-2Ag-36Pb solder is also considered to establish a baseline. These two solder alloys are assumed to obey the Garofalo-Arrhenius steady-state creep constitutive law. The shear stress and shear creep strain hysteresis loops, shear stress history, shear creep strain history, and creep strain density range at the corner solder joint are presented for a better understanding of the thermal-mechanical behavior of the lead-free solder bumped WLCSP on microvia buildup PCB assemblies
Keywords :
assembling; chip scale packaging; circuit reliability; creep; hysteresis; modelling; printed circuit manufacture; silver alloys; soldering; stress analysis; stress-strain relations; thermal expansion; thermal stresses; tin alloys; 62Sn-2Ag-36Pb solder; 96.5Sn-3.5Ag. solder; Garofalo-Arrhenius law; Sn-Ag; Sn-Ag-Pb; chip scale package; corner solder joint; creep strain density range; lead-free solder alloys; microvia buildup PCB assemblies; printed circuit board assemblies; reliability; shear creep strain history; shear creep strain hysteresis loops; shear stress; shear stress history; solder bumped CSP; steady-state creep constitutive law; thermal cycling conditions; thermo-mechanical behaviour; time-temperature-dependent nonlinear analyses; wafer level CSP; Assembly; Capacitive sensors; Chip scale packaging; Creep; Environmentally friendly manufacturing techniques; History; Lead; Semiconductor device modeling; Soldering; Thermal stresses;
fLanguage :
English
Journal_Title :
Electronics Packaging Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
1521-334X
Type :
jour
DOI :
10.1109/TEPM.2002.1000483
Filename :
1000483
Link To Document :
بازگشت