Carrier multiplication in submicrometre pMOS transistors operated at cryogenic temperatures

The temperature and bias dependence of the carrier multiplication M(I_bulk/I_drain) in submicrometre pMOS transistors has been characterised and studied over the temperature range of 30-300 K. In addition, a model which reproduces the bias dependence of M over the measured range of temperature can be extrapolated down to 4.2 K to predict the internal bulk potential and its related ´kink effect´. The agreement between data and the prediction of the model confirms that the gate voltage and temperature dependence of the mean free path plays the key role in determining the carrier multiplication characteristics of submicrometre pMOS transistors, operating in the temperature range of 4.2-300 K.