Characteristics of new dielectric isolation wafers for high voltage power IC´s by single-Si poly-Si direct bonding (SPSDB) technique

Author

Inoue, Yohsuke ; Sugawara, Yoshitaka ; Kurita, Shinichi

Author_Institution

Res. Lab., Hitachi Ltd., Ibaraki, Japan

Volume

42

Issue

2

fYear

1995

fDate

2/1/1995 12:00:00 AM

Firstpage

356

Lastpage

358

Abstract

Physical and mechanical characteristics of a new DI (Dielectric Isolation) wafer based on a single-Si poly-Si direct bonding (SPSDB) technique were investigated to reduce wafer warpage, increase wafer size and decrease minimum device patterning size. Developed SPSDB wafers of 5-inch size had unchanging warpage height and high bonding strength. When SPSDB wafers were bonded at 1100°C for 2 h, the latter property was comparable to that of the thermal oxidizing layer interface

Keywords

isolation technology; monolithic integrated circuits; power integrated circuits; silicon; wafer bonding; 1100 C; 2 hour; 5 in; HV power IC; Si; dielectric isolation wafers; high bonding strength; high voltage IC; mechanical characteristics; minimum device patterning size reduction; physical characteristics; single crystal Si/polysilicon wafer bonding; single-Si poly-Si direct bonding; wafer size increase; wafer warpage reduction; Dielectric devices; Fabrication; Parasitic capacitance; Silicon; Substrates; Temperature measurement; Testing; Thermal conductivity; Voltage; Wafer bonding;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/16.370057

Filename

370057