Complex Shaped On-Wafer Interconnects Modeling for CMOS RFICs

Author

Shi, Xiaomeng ; Yeo, Kiat Seng ; Ma, Jian-Guo ; Do, Manh Anh ; Li, Erping

Author_Institution

Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore

Volume

16

Issue

7

fYear

2008

fDate

7/1/2008 12:00:00 AM

Firstpage

922

Lastpage

926

Abstract

A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empirical expressions. Thus, the proposed model can be easily incorporated with commercial electronic design automation (EDA) tools. The accuracy of the model is validated by the on-wafer measurements up to 20 GHz.

Keywords

CMOS integrated circuits; electronic design automation; radiofrequency integrated circuits; semiconductor device models; wafer-scale integration; CMOS RFIC; electronic design automation; on-wafer interconnects modeling; on-wafer measurements; Electronic design automation and methodology; Equivalent circuits; Integrated circuit interconnections; Integrated circuit measurements; Parameter extraction; Radio frequency; Radiofrequency integrated circuits; Semiconductor device modeling; Shape; Testing; CMOS radio frequency integrated circuits (RFICs); equivalent circuit model; interconnects; on-wafer measurements;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2008.2000445

Filename

4539805