DocumentCode
747143
Title
Field-plate engineering for HFETs
Author
Karmalkar, Shreepad ; Shur, Michael S. ; Simin, Grigory ; Khan, M.Asif
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., Madras, India
Volume
52
Issue
12
fYear
2005
Firstpage
2534
Lastpage
2540
Abstract
This paper reports on the analytical approach for designing field plates for reducing the electric field in the channel and at the surface of heterostructure field-effect transistors (HFETs) for a given drain voltage, with the smallest possible increase of the gate capacitance. The analytical calculations for GaN-based HFETs are in good agreement with the two-dimensional numerical simulations.
Keywords
III-V semiconductors; capacitance; electric fields; gallium compounds; high electron mobility transistors; numerical analysis; plates (structures); semiconductor device models; GaN; HFET; channel; drain voltage; electric field reduction; field plate engineering; gate capacitance; heterostructure field effect transistor; numerical simulation; Capacitance; Dielectric constant; Dielectrics and electrical insulation; Doping; HEMTs; Helium; MODFETs; Numerical simulation; Polarization; Voltage; Analytical modeling; field plate; heterostructure field effect transistor (HFET);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2005.859568
Filename
1546312
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