• DocumentCode
    747286
  • Title

    Hierarchical design of delay-insensitive systems

  • Author

    Lam, P.N. ; Li, H.F.

  • Author_Institution
    Dept. of Comput. Sci., Concordia Univ., Montreal, Que., Canada
  • Volume
    137
  • Issue
    1
  • fYear
    1990
  • fDate
    1/1/1990 12:00:00 AM
  • Firstpage
    41
  • Lastpage
    56
  • Abstract
    A set of building blocks is presented for the hierarchical design of delay-insensitive systems. It consists of delay-insensitive (DI) building blocks and hybrid (non-DI) building blocks. An extended signal transition graph (STG) model is used for circuit specification and analysis. It permits the clear specification of delay-insensitive circuits, distinguishing between environment/module behaviour and DI/non-DI components. A hierarchical composition procedure is described for the composition of deterministic STG specifications. As an example, a circuit for distributed mutual exclusion is designed and implemented.
  • Keywords
    logic CAD; building blocks; circuit specification; delay-insensitive systems; distributed mutual exclusion; environment/module behaviour; hierarchical design; hybrid building blocks; signal transition graph;
  • fLanguage
    English
  • Journal_Title
    Computers and Digital Techniques, IEE Proceedings E
  • Publisher
    iet
  • ISSN
    0143-7062
  • Type

    jour

  • Filename
    41351
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=747286