Traffic routing algorithm for serial superchip system customisation

A traffic routing algorithm is presented for system customisation of the serial superchip architecture. In modern signal processing and scientific computation, system reconfigurability is highly desired to achieve dynamic reconfiguration during system operation and static reconfiguration. For example, for defect/fault tolerance before system operation. The superchip architecture is aimed at achieving both dynamic and static reconfigurability. The algorithm introduced here is intended to help system designers customise a superchip (which may be partially good) at the systems level. The algorithm will optimally search for traffic routes according to the connectivity information extracted from system specification, while avoiding defective elements on the chip.