Title :
A formal framework for conversion from binary to residue numbers
Author :
Premkumar, A. Benjamin
Author_Institution :
Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore
fDate :
2/1/2002 12:00:00 AM
Abstract :
Residue number systems (RNS) offer unlimited opportunities for high performance arithmetic provided efficient forward and reverse converters can be constructed for the moduli set at hand. All forward conversion proposals to date require some read-only memory (ROM) along with computational elements like full adders (FA). Also, there is no single coherent approach for forward conversion design-each study proposes its own conversion philosophy. There is a clear need for a single parameterizable forward conversion model that can capture most of the important design parameters in the solution space. In this paper, we take the first step toward such a universal model. We show that by formulating the forward conversion problem in terms of modular exponentiation and addition, we can achieve memory free conversion. Furthermore, we generalize our solution such that bit serial and bit parallel implementations can be derived by simply varying a parameter. This allows the designer of the forward converter to ask "what if" questions and explore an optimal forward conversion solution. Apart from the formulation itself, the paper makes two other contributions. First, it demonstrates an entirely new set of converters that use no lookup. Second, we show how conversion complexity can be reduced significantly by sharing some of the circuitry over several forward converters
Keywords :
VLSI; adders; computational complexity; multiplexing equipment; read-only storage; residue number systems; binary numbers; computational elements; conversion complexity; conversion philosophy; formal framework; forward converters; full adders; high performance arithmetic; memory free conversion; modular addition; modular exponentiation; moduli set; read-only memory; residue numbers; reverse converters; Adders; Circuits; Computer errors; Digital arithmetic; Digital signal processing; Error correction; Proposals; Read only memory; Registers; Very large scale integration;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
DOI :
10.1109/TCSII.2002.1002515