DocumentCode :
748204
Title :
Voltage-Island Partitioning and Floorplanning Under Timing Constraints
Author :
Lee, Wan-Ping ; Liu, Hung-Yi ; Chang, Yao-Wen
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
Volume :
28
Issue :
5
fYear :
2009
fDate :
5/1/2009 12:00:00 AM
Firstpage :
690
Lastpage :
702
Abstract :
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction. The underlying idea behind MSV is the tradeoff between power saving and performance. In this paper, we present an effective voltage-assignment technique based on dynamic programming. For circuits without reconvergent fan-outs, an optimal solution for the voltage assignment is guaranteed; for circuits with reconvergent fan-outs, a near-optimal solution is obtained. We then generate a level shifter for each net that connects two blocks in different voltage domains and perform power-network-aware floorplanning for the MSV design. Experimental results show that our floorplanner is very effective in optimizing power consumption under timing constraints.
Keywords :
circuit layout; dynamic programming; dynamic programming; level shifter; multiple supply voltage; nanometer chip design; power saving; power-network-aware floorplanning; timing constraints; voltage-assignment technique; voltage-island partitioning; Floorplanning; layout; low power; multiple supply voltage (MSV); physical design;
fLanguage :
English
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
0278-0070
Type :
jour
DOI :
10.1109/TCAD.2009.2013997
Filename :
4838821
Link To Document :
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