Title :
Performance analysis and optimisation of NCL self-timed rings
Author :
Kuang, W. ; Yuan, J.S. ; DeMara, R.F. ; Hagedorn, M. ; Fant, K.
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
fDate :
6/6/2003 12:00:00 AM
Abstract :
A self-timed ring using NULL convention logic (NCL) is presented. An analytical method to evaluate the speed of NCL rings has been developed. The analytical predictions are verified by a Synopsys simulation and excellent agreement between the theoretical predictions and simulation results is obtained. Some important principles for ring optimisation are obtained. The analysis leads to the speed optimisation of a 24-bit NCL divider.
Keywords :
circuit optimisation; delays; dividing circuits; graph theory; integrated logic circuits; logic design; 24 bit; NCL ring speed evaluation; NCL self-timed rings; NULL convention logic; Synopsys simulation; dependency graphs; performance analysis; performance optimisation; ring optimisation; speed optimisation;
Journal_Title :
Circuits, Devices and Systems, IEE Proceedings -
DOI :
10.1049/ip-cds:20030343
