• DocumentCode
    748706
  • Title

    Single-event upset in highly scaled commercial silicon-on-insulator PowerPC microprocessors

  • Author

    Irom, F. ; Farmanesh, F.H.

  • Author_Institution
    Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
  • Volume
    52
  • Issue
    5
  • fYear
    2005
  • Firstpage
    1524
  • Lastpage
    1529
  • Abstract
    Single-event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes and core voltages. The results are compared with results for similar devices with bulk substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold is about the same, even though the charge collections depth is more than an order of magnitude smaller in the SOI devices. The scaling of the cross section with reduction of feature size and core voltage dependence for SOI microprocessors is discussed.
  • Keywords
    microprocessor chips; radiation effects; silicon-on-insulator; IBM; Motorola; SOI processors; bulk substrates; charge collections; core voltages; cyclotron; heavy ion; powerPC microprocessors; silicon-on-insulator; single-event upset; Degradation; Manufacturing processes; Microprocessors; NASA; Silicon on insulator technology; Single event upset; Space technology; Substrates; Testing; Voltage; Cyclotron; heavy ion; microprocessors; silicon-on-insulator (SOI);
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2005.855816
  • Filename
    1546453