DocumentCode :
749760
Title :
Hangup in Phase-Lock Loops
Author :
Gardner, Floyd M.
Author_Institution :
Gardner Res. Co., Palo Alto, CA, USA
Volume :
25
Issue :
10
fYear :
1977
fDate :
10/1/1977 12:00:00 AM
Firstpage :
1210
Lastpage :
1214
Abstract :
A phase-lock loop occasionally will take a long time to settle to equilibrium. Phase dwells at a large error for a prolonged interval. This phenomenon has been dubbed "hangup." The periodic nature of phase detectors is responsible for hangup, which occurs near the reverse-slope, unstable null. Restoring force is small in the vicinity of the reverse null, and noise causes the loop to equivocate about the null. Hangup is very troublesome when fast acquistion is needed with high reliability. One example is synchronization of digital communications. Hangups can be avoided if a large restoring force is applied for large phase errors and if equivocation is prevented. An implementation of an antihangup circuit is proposed.
Keywords :
PLLs; Phase-locked loop (PLL); Circuits; Communications Society; Data communication; Detectors; Digital communication; Frequency synchronization; Phase detection; Phase locked loops; Time division multiple access; Voltage;
fLanguage :
English
Journal_Title :
Communications, IEEE Transactions on
Publisher :
ieee
ISSN :
0090-6778
Type :
jour
DOI :
10.1109/TCOM.1977.1093739
Filename :
1093739
Link To Document :
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