Title :
Thermal modeling and experimental characterization of the C4/surface-mount-array interconnect technologies
Author :
Kromann, Gary B.
Author_Institution :
Adv. Packaging Technol., Microprocessor Memory & Technol. Group, Motorola Inc., Austin, TX, USA
fDate :
3/1/1995 12:00:00 AM
Abstract :
This paper presents various thermal management options available for controlled collapse chip connection (C4) die attached to a ceramic surface mount array (SMA) substrate, as they apply to low end/midrange computer products. The Motorola 88110 RISC microprocessor was used as a thermal test vehicle to verify theoretical models, for a limited set of boundary conditions. A thermal test board was designed to accommodate the 25 mm substrate and its use will be discussed. The focus is the internal package resistance and the effects of parameters such as: the 64 bumps, the thermal paste, and the thermal paste thickness, However, the die junction-to-ambient resistance is presented for attached commercially-available heat sinks convectively cooled (to 4 m/s) for typical workstation computer-systems operational constraints
Keywords :
arrays; heat sinks; integrated circuit interconnections; microprocessor chips; surface mount technology; thermal resistance; C4 bumps; C4/SMA interconnect technologies; Motorola 88110 RISC microprocessor; boundary conditions; ceramic surface mount array substrate; controlled collapse chip connection; die attach; heat sinks; internal package resistance; junction-to-ambient resistance; thermal management; thermal modeling; thermal paste; thermal test board; workstation computer-systems; Boundary conditions; Ceramics; Microprocessors; Packaging; Reduced instruction set computing; Resistance heating; Testing; Thermal management; Thermal resistance; Vehicles;
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on
