Title :
Compact modeling of thermal resistance in bipolar transistors on bulk and SOI substrates
Author :
Pacelli, Andrea ; Palestri, Pierpaolo ; Mastrapasqua, Marco
Author_Institution :
Dept. of Electr. & Comput. Eng., State Univ. of New York, Stony Brook, NY, USA
fDate :
6/1/2002 12:00:00 AM
Abstract :
Analytical expressions for the thermal resistance of bipolar transistors on bulk and SOI substrates are presented. The models are derived on the basis of intuitive physical pictures and validated by comparison with experimental data and three-dimensional (3D) device simulation. The effect of bulk and SOI substrates, shallow- and deep-trench isolation, and multiple emitter fingers is accounted for. All models are suitable for both hand calculations and computer-aided design
Keywords :
bipolar transistors; circuit CAD; heating; isolation technology; semiconductor device models; silicon-on-insulator; thermal analysis; thermal resistance; 3D device simulation; SOI substrates; Si-SiO2; bipolar transistors; bulk substrates; computer-aided design; deep-trench isolation; modeling; multiple emitter fingers; shallow-trench isolation; thermal resistance; Bipolar transistors; Computational modeling; Dielectric substrates; Equations; MOSFETs; Silicon on insulator technology; Solid modeling; Thermal conductivity; Thermal resistance; Two dimensional displays;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2002.1003724
