DocumentCode
751263
Title
A new lateral PNM Schottky collector bipolar transistor (SCBT) on SOI for nonsaturating VLSI logic design
Author
Kumar, M. Jagadesh ; Rao, D. Venkatesh
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
Volume
49
Issue
6
fYear
2002
fDate
6/1/2002 12:00:00 AM
Firstpage
1070
Lastpage
1072
Abstract
The novel characteristics of a new lateral PNM Schottky collector bipolar transistor (SCBT) on silicon-on-insulator (SOI) are explored using two-dimensional (2D) simulation. The collector-base junction of the proposed lateral PNM transistor consists of a Schottky junction between n-base (N) and metal (M). The characteristics of this structure are compared with that of lateral PNP transistors on SOI. We demonstrate that the proposed structure has a superior performance in terms of reduced collector resistance, high current gain, negligible base widening, and very low reverse recovery time compared to the compatible lateral PNP transistors. A simple fabrication procedure is also suggested providing the incentive for experimental verification
Keywords
Schottky barriers; VLSI; bipolar logic circuits; bipolar transistors; electric resistance; integrated circuit design; logic design; numerical analysis; semiconductor device models; silicon-on-insulator; 2D simulation; SCBT; SOI; Schottky collector; Schottky junction; Si-SiO2; base widening; collector resistance; collector-base junction; current gain; fabrication procedure; lateral PNM Schottky collector bipolar transistor; lateral PNM transistor; nonsaturating VLSI logic design; numerical simulation; reverse recovery time; BiCMOS integrated circuits; Bipolar transistors; Fabrication; Isolation technology; Logic design; MOSFETs; Performance gain; Silicon on insulator technology; Two dimensional displays; Very large scale integration;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2002.1003748
Filename
1003748
Link To Document