Title :
New collector undercut technique using a SiN sidewall for low base contact resistance in InP/InGaAs SHBTs
Author :
Lee, Kyungho ; Yu, Daekyu ; Chung, Minchul ; Kang, Jongchan ; Kim, Bumman
Author_Institution :
Dept. of Electron. & Electr. Eng., Pohang Univ. of Sci. & Technol., South Korea
fDate :
6/1/2002 12:00:00 AM
Abstract :
A new collector undercut process using SiN protection sidewall has been developed for high speed InP/InGaAs single heterojunction bipolar transistors (HBTs). The HBTs fabricated using the technique have a larger base contact area, resulting in a smaller DC current gain and smaller base contact resistance than HBTs fabricated using a conventional undercut process while maintaining low Cbc. Due to the reduced base contact resistance, the maximum oscillation frequency (fmax) has been enhanced from 162 GHz to 208 GHz. This result clearly shows the effectiveness of this technique for high-speed HBT process, especially for the HBTs with a thick collector layer, and narrow base metal width
Keywords :
III-V semiconductors; S-parameters; contact resistance; current density; gallium arsenide; heterojunction bipolar transistors; indium compounds; microwave bipolar transistors; sputter etching; 0.5 to 40 GHz; DC current gain; InP-InGaAs; RIE; SEM; SiN; base contact resistance; collector undercut process; current-voltage curves; high speed HBT; larger base contact area; low parasitic interconnection; microwave S-parameters; narrow base metal width; protection sidewall; selective etch; small-signal parameters; solid source molecular beam epitaxy; surface recombination; thick collector layer; Charge pumps; Contact resistance; Etching; Heterojunction bipolar transistors; Indium gallium arsenide; Indium phosphide; MOSFET circuits; Protection; Silicon compounds; Very large scale integration;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2002.1003753
