DocumentCode :
751740
Title :
CA-based byte error-correcting code
Author :
Chowdhury, Dipanwita Roy ; Gupta, Indranil Sen ; Chaudhuri, Parimal Pal
Author_Institution :
Dept. of Comput. Sci. & Eng., Regional Eng. Coll., Durgapur, India
Volume :
44
Issue :
3
fYear :
1995
fDate :
3/1/1995 12:00:00 AM
Firstpage :
371
Lastpage :
382
Abstract :
This paper reports a novel approach for designing byte error-correcting codes using cellular automata (CA). A simple scheme for generation and decoding of single-byte error-correcting and double-byte error-detecting codes, referred to as CA-SbEC-DbED, is presented. Extension of the scheme to locate/correct larger number of information byte errors has been also included. The encoding and decoding algorithms have been designed with the help of a linear operator that can be conveniently realized with a maximum length group CA. The regular, modular and cascadable structure of CA can be economically built with VLSI technology. Compared to the existing architecture of the Reed-Solomon decoder chip, CA-based implementation of the proposed decoding scheme provides a simple cost effective solution
Keywords :
cellular automata; error correction codes; logic testing; CA-SbEC-DbED; byte error-correcting code; cellular automata; decoding scheme; error-detecting codes; fault tolerance; information byte errors; signature analysis; Automata; Computer errors; Decoding; Encoding; Error correction; Error correction codes; Random access memory; Read-write memory; Reed-Solomon codes; Very large scale integration;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.372030
Filename :
372030
Link To Document :
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