DocumentCode
751756
Title
Synthesis of Decision-Free Concurrent Systems for Prescribed Resources and Performance
Author
Murata, Tadao
Author_Institution
Department of Information Engineering, University of Illinois
Issue
6
fYear
1980
Firstpage
525
Lastpage
530
Abstract
This paper presents a method for synthesizing or growing live and safe marked graph models of decision-free concurrent comutations. The approach is modular in the sense that subsystems r represented by arcs (and nodes) are added one by one without the need of redesigning the entire system. The foliowing properties of marked graph models can be prescribed in the synthesis: liveness (absence of deadlocks), safeness (absence of overflows), the number of reachability classes, the maximum resource (temporary storage) requirement, computation rate (performance), as well as the numbers of arcs and states.
Keywords
Absence of overflows; deadlock-freeness; decision-free concurrent systems; marked graphs; maximum resources; modular synthesis; parallel computation model; prescribed perfornance; Application software; Circuit synthesis; Computational modeling; Concurrent computing; Flowcharts; Hardware; Petri nets; Power system modeling; Software systems; System recovery; Absence of overflows; deadlock-freeness; decision-free concurrent systems; marked graphs; maximum resources; modular synthesis; parallel computation model; prescribed perfornance;
fLanguage
English
Journal_Title
Software Engineering, IEEE Transactions on
Publisher
ieee
ISSN
0098-5589
Type
jour
DOI
10.1109/TSE.1980.230802
Filename
1702778
Link To Document