DocumentCode :
753571
Title :
A 
-Band CMOS Distributed Doubler With Current-Reuse Technique
Author :
Lin, Kun-You ; Huang, Jhih-Yu ; Shin, Shih-Chieh
Author_Institution :
Dept. of Electr. Eng. & Grad. Inst. of Commun. Eng., Nat. Taiwan Univ., Taipei
Volume :
19
Issue :
5
fYear :
2009
fDate :
5/1/2009 12:00:00 AM
Firstpage :
308
Lastpage :
310
Abstract :
A K-band distributed frequency doubler is developed in 0.18 mum CMOS technology. This doubler combines the distributed topology for broadband characteristics and current-reuse technique to improve the conversion gain. The high-pass drain line and high-pass inter-stage matching network are used to obtain a good fundamental rejection. A measured conversion gain of better than -12.3 -dB is obtained, and the fundamental rejection is better than 30 dB for the output frequency between 18 and 26 GHz. The dc power consumption is 10.5 mW with a chip size of 0.55 times 0.5 mm2.
Keywords :
CMOS integrated circuits; broadband networks; frequency multipliers; network topology; radiocommunication; CMOS distributed doubler; current-reuse technique; dc power consumption; frequency 18 GHz to 27 GHz; high-pass drain line; high-pass interstage matching network; power 10.5 mW; size 0.18 mum; Broadband; CMOS; distributed doubler;
fLanguage :
English
Journal_Title :
Microwave and Wireless Components Letters, IEEE
Publisher :
ieee
ISSN :
1531-1309
Type :
jour
DOI :
10.1109/LMWC.2009.2017598
Filename :
4840504
Link To Document :
